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Dual Band FM stereo tuner

The appearance of KR174HA51 circuit on the domestic market (dual-band stereo decoder) was the impetus to considerations about the possibility of creating a simple dual-band receiver equipped with a frequency synthesizer and an electronic character indicator.

It turned out to be possible to create such a tuner based on TEA5710 and TSA6057 circuits. Without going into a detailed description of the principles of broadcasting on VHF, the use of radio chips, frequency synthesizers, microcontrollers, it is recommended that you should find the documentation.

The main parameters of the TEA5710 chip are given in the table below (the measurement is carried out under the condition fi = 100 MHz, Dfi = 22.5 kHz, fm = l kHz, Vp = 3V).

The device is available in the SDIP24 (SOT234-1) body frame with lead pitch of 1.75 mm, which allows its installation on the PCB into the holes.

Parameter of technical conditions

Symbol

Min.

Norm

Max.

Measuring units

Supply voltage

Vp

2.0

-

12

V

Current consumption in FM mode

Ip

7.3

9.0

11.2

mA

Working temperature

Tamb

-15

-

+60

C

Usable Sensitivity

Vin3

1.0

2.0

3.8

uV

Total harmonic distortion

THD

-

0.8

2.0

%

Input capacitance

Ci

-

3

-

pF

Current indicator of fine adjustment in the "set" position

Iind

2

3.5

6

mA

Current indicator of fine adjustment in the "not set" position

Iindoff

-

0

10

uA

The main problem associated with the creation of a dual-band tuner lies in the lack of overlap factor range by adjusting elements (capacitor diods). Simply said, there is lack in the range of variation of their capacity for frequency tuning from 63 to 108 MHz. Solving the problem of electronic switching ranges, we tested the options of switching ranges of inductive elements of both resonant circuits and capacitor circuits. Both methods proved to be workable and have the right to exist. However, the option of switching capacitive elements is somewhat more simple in practical implementation, so we chose it for description.

Switching method is shown in Picture 1. As it can be seen in the picture, the circuit based on a non-configurable inductance L includes two independent parallel of capacitance strings formed with C1 and VD1 and C2 and VD2. And the string C2-VD2 is controlled by the setting voltage U1 smoothly, and the string C1-VD1 has only two capacitance values: minimum and maximum. Switching is performed with the transistor VT1 by means of voltage U2, which either a microcontroller can form, or some other source can. With the presented scheme, overlap factor of vc diodes increases twofold.

Full stereo tuner circuit is shown in Picture 2. Let’s take a detailed look at it. A radio-receiving portion containing a tunable radio frequency amplifier (AMP) that amplifies the signal from the antenna WA1, a local oscillator and an intermediate frequency amplifier with CDA Z3 discriminator is assembled on the chip. Contours are rebuilt by vc diodes VD1 ... VD8, and vc diodes VD1, VD 2, VD7, VD8 are used to switch the gamuts and vc diodes VD3 ... VD6 are used for smooth gamut aligity. Fine-tuning indicator HL1 allows you to control not only the position of the settings, but also the level of the RF input signal. Transistor VT1 is a source follower, buffering the LO signal. It is important that in this receiver the local oscillator frequency is 10.7 MHz above the frequency of the received signal.

Chip D2 is a stereo decoder designed to work both in a system with pilot tone, and in a system with polar modulation. Resistor R20 provides the internal VCO frequency setting. Elements R13, R14, R15, R16, C33, C34 is intended for predistortion when decoding signals with polar modulation. In the scheme, these elements are taken from the available stock, with the following tolerances: resistors with a tolerance of ± 0,25% (type C2-29), capacitors with a tolerance of ± 0,5% (type K71-7). In general, the desired time correction constant can be obtained at other values of element rating levels. It is only important to sustain the following ratio: T1 = (R1Z + R14 + R15 + R16) × (SPZ + C34) = 1.0186 m/s ± 1%.